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Portrait of Jin-Won Hyun

Alumni · M.S. · 2025

Jin-Won Hyun

AMS / EM design automation · PLL

LIG Nex1

Position

Electronic Engineer, LIG Nex1 (Jan. 2025 ~)

Education

B.S. SeoulTech, 2023

M.S. SeoulTech, 2025 (2023. 03. - 2025. 02)

Research

Analog/mixed-signal circuit design automation; clock generation; high-speed, high-resolution ADCs; AMS/EM design automation; PLLs.

Research achievements

1 journal article · 6 conference papers

Publications listed in the AD-Lab archive. Entries are ordered from newest to oldest within each category.

Journal articles

Conference papers

2025

IEIE Summer Annual Conference, Jeju, June 2025

Domestic conference

Measurement-Based Standard CMOS Photodiode Modeling and Layout Optimization

M.-H. Jeon, E. Yoo, J.-W. Hyun, J. Lee, J.-P. Hong, J.-W. Nam

2025

7th ISE Winter Conference, Buyeo, January 2025

Domestic conference

ML-Based Design Optimization for Dickson Charge Pump

E. Yoo, J.-W. Hyun, J.-W. Nam

2024

International SoC Conference (ISOCC) 2024, Japan, Aug. 2024.

International conference

AI-Assisted Design Automation of Circular and Asymmetric Inductor in CMOS Technology

J.-W. Hyun, D. Kim, K.-S. Choi, J.-W. Nam

2023

International Conference on Electronics, Information, and Communication (ICEIC) 2023, Singapore, Feb. 2023.

International conference

Regression Model-based VCO Design Optimization Technique

J.-W. Hyun, J.-W. Nam

2022

5th ISE Conference, Seoul, December 2022

Domestic conference

Design Optimization of a Bootstrapped Sample-and-Hold Circuit Using an Artificial Neural Network

H. Yoo, J.-W. Hyun, J.-W. Nam

2022

IEIE Fall Annual Conference, Gonjiam, November 2022 · Capstone project

Domestic conference

Study on Jitter Analysis and Reduction Methods in DLL

J.-W. Hyun, J.-Y. Kim, S.-J. Kim, J.-W. Nam (corresponding author)

Bold blue names* indicate corresponding authors. Funding and awards are included where recorded in the source.